Comparing Propagation Delays and Power Dissipation on CMOS-simulated Circuits in HSPICE
نویسندگان
چکیده
A four-bit adder is simulated using HSPICE in two classic design methods: a ripple-carry adder (RCA) and a carry-look-ahead adder (CLA). All components of the adders are composed of PMOS, NMOS, and capacitors. The propagation delay and power dissipation were measured under different VDD values and different operating temperatures in HSPICE. A comparison of these two metrics were analyzed between the RCA and CLA, and concludes that both the CLA and RCA operates optimally at low temperatures and are unsuitable for high VDD environments, CLA is preferred for faster computation while RCA is preferred for smaller chip size, and the CLA is preferred for high-frequency adder usage situations, and the CLA is more suitable for low-VDD systems.
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